Table of Contents
Advertisement
13.2 Clock Output Control Circuit Configuration
The clock output control circuit consists of the following hardware.
Table 13-1. Clock Output Control Circuit Configuration
Control register
Figure 13-2. Clock Output Control Circuit Block Diagram
f
XX
f
/2
XX
2
f
/2
XX
3
f
/2
XX
4
f
/2
XX
5
f
/2
XX
6
f
/2
XX
7
f
/2
XX
f
XT
CLOE TCL03 TCL02 TCL01 TCL00
Timer Clock Select Register 0
284
CHAPTER 13 CLOCK OUTPUT CONTROL CIRCUIT
Item
Timer clock select register 0 (TCL0)
Port mode register 3 (PM3)
Synchronizing
Circuit
4
Output Latch
Internal Bus
Configuration
P35
PM35
PCL /P35
Port Mode Register 3
Advertisement
Table of Contents
