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Motorola MVME187 Manuals
Manuals and User Guides for Motorola MVME187. We have
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Motorola MVME187 manual available for free PDF download: Installation Manual
Motorola MVME187 Installation Manual (173 pages)
RISC Single Board Computer
Brand:
Motorola
| Category:
Single board computers
| Size: 0.94 MB
Table of Contents
Table of Contents
7
List of Tables
14
About this Manual
15
This Chapter Covers
15
Data and Address Parameter Numeric Formats
16
Signal Name Conventions
16
Terminology, Conventions, and Deþnitions Used in this Manual
16
Assertion and Negation Conventions
17
Big-Endian Byte Ordering
17
Data and Address Size Deþnitions
17
Bit Value Descriptions
18
Control and Status Bit Deþnitions
18
True/False Bit State Deþnitions
18
Document Set for MVME187-0Xx Board
19
Related Documentation
19
Additional Manuals for this Board
20
Other Applicable Motorola Publications
20
Non-Motorola Peripheral Controllers Publications Bundle
21
Applicable Non-Motorola Publications
23
General Description
25
This Chapter Covers
25
Onboard Memory Mezzanine Module
26
SCSI Mass Storage Interface
26
Ethernet Transceiver Interface
27
Parallel (Printer) Port
27
Serial Ports
27
187Bug Firmware
28
Features
28
Conformance to Requirements
30
Speciþcations
30
Adapters
31
Board Level Overview
31
Connectors
31
Asics
32
Transition Modules
32
Bus Transfers
33
Pccchip2 ASIC
33
Vmechip2 ASIC
33
Functional Description
34
MCECC Memory Controller ASIC
34
MEMC040 Memory Controller ASIC
34
Front Panel Leds
35
Front Panel Switches
35
Front Panel Switches and Leds
35
Data Bus Structure
36
Local Bus Arbitration
36
M88000 Mpu
36
Eprom
37
Programmable EPROM Features
37
Static RAM
37
Optional SRAM Battery Backup
38
Onboard DRAM
39
DRAM Programming Considerations
40
Stacking Mezzanines
40
Battery Backed up RAM and Clock
41
I/O Interfaces
42
Serial Port Interface
42
Vmebus Interface
42
Parallel Port Interface
44
Ethernet Interface
45
SCSI Interface
46
Local Bus Timeout
47
Local Resources
47
Programmable Tick Timers
47
Software-Programmable Hardware Interrupts
47
Watchdog Timer
47
Local Bus Memory Map
48
Memory Maps
48
Normal Address Range Devices
48
Local Bus Memory Map
49
Local I/O Devices Memory Map
50
Vmebus Accesses to the Local Bus
52
Vmebus Memory Map
52
Vmebus Short I/O Memory Map
52
This Chapter Covers
53
Unpacking the Equipment
53
Overview of Startup Procedure
54
Startup Overview
54
Modifying Conþguration before Installation
57
Option Modification
57
Preparing the Hardware
57
Checking the 187Bug Eproms
59
EPROM Location
59
EPROM Orientation
59
Jumper Settings
59
User-Programmed Eproms
59
General Purpose Software Readable Header J1
60
Optional Jumper Settings
60
System Controller Header J2
62
Optional SRAM Backup Power Source Select Header J6
63
Serial Port 4 Clock Configuration Select Headers J7 and J8
63
Settings for Optional J6 SRAM Backup Power Source Select Header
64
Select Headers
65
Preparing the MVME187 for Installation
66
Chassis Preparation/Slot Selection Procedure
67
Preparing the System Chassis
67
Installing the Hardware
68
Installing the MVME187 in the Chassis
68
Transition Modules and Adapter Boards Overview
69
Equipment Connections
71
Peripheral Connections
71
Connecting Peripherals
72
Installing Transition Modules and Adapter Boards
72
Transition Module and Adapter Board Installation Overview
72
Peripheral Connection Procedures
73
Completing the Installation
76
Starting the System
76
Examining And/Or Changing Environmental Parameters
77
Initializing the Real-Time Clock
77
Powering up the System
77
Programming the Pccchip2 and Vmechip2
78
Backplane Power Connections
79
DRAM Addressing
79
Global Bus Timeout
79
Memory Address Ranges
79
System Considerations
79
Ethernet LAN (+12 VDC) Fuse
80
GCSR Location Monitor Register
80
Multiple Module Cage Configuration
80
SCSI Bus Termination
81
Storage and the Real-Time Clock
81
Introduction to Mvme187Bug
83
Overview of M88000 Firmware
83
This Chapter Covers
83
Command Facilities
84
Description of 187Bug
84
Trap #496 Routines
84
Debugger or Diagnostic Directories
85
Keyboard Control
85
187Bug Implementation
86
Comparison with M68000-Based Firmware
86
Booting and Restarting 187Bug
87
Memory Requirements
87
Autoboot
88
Autoboot Sequence
88
Starting up 187Bug
88
Romboot
89
Romboot Sequence
89
Network Boot
90
Network Boot Sequence
90
Restarting the System
91
Abort
92
Reset
92
Break
93
MPU Clock Speed Calculation
94
SYSFAIL* Assertion/Negation
94
Disk I/O Support
95
Disk Support Facilities
95
Parameter Tables
95
Supported Controllers
95
Blocks Versus Sectors
96
Device Probe Function
96
BO (Bootstrap Operating System)
97
Disk I/O Via 187Bug Commands
97
IOC (I/O Control)
97
IOI (Input/Output Inquiry)
97
IOP (Physical I/O to Disk)
97
IOT (I/O Teach)
97
BH (Bootstrap and Halt)
98
Controller Command Packets
98
Disk I/O Via 187Bug System Calls
98
Default 187Bug Controller and Device Parameters
99
Disk I/O Error Codes
100
Intel 82596 LAN Coprocessor Ethernet Driver
101
Network I/O Support
101
UDP/IP Protocol Modules
101
BOOTP Protocol Module
102
Network Boot Control Module
102
RARP/ARP Protocol Modules
102
TFTP Protocol Module
102
Multiprocessor Control Register (MPCR) Method
103
Multiprocessor Support
103
Network I/O Error Codes
103
MPCR Powerup Sequence
104
MPCR Status Codes
104
Multiprocessor Address Register (MPAR)
104
Global Control and Status Register (GCSR) Method
106
Diagnostic Facilities
107
Diagnostic Utilities
108
187Bug Diagnostic Test Groups
109
Entering Debugger Command Lines
111
Terminal Input/Output Control
111
This Chapter Covers
111
Debugger Command Syntax
113
Expression as a Parameter
114
Syntactic Variables
114
Address as a Parameter
115
Address Formats
116
Offset Registers
117
Port Numbers
117
Creating a Program with the Assembler/Disassembler
118
Downloading an S-Record Object File
118
Entering and Debugging Programs
118
Calling System Utilities from User Programs
119
Read the Program from Disk
119
187Bug Vector Table and Workspace
120
Preserving the Debugger Operating Environment
120
CPU/MPU Registers
121
Exception Vectors Used by 187Bug
121
Floating Point Support
121
Hardware Functions
121
Double Precision Real
123
Single Precision Real
123
ScientiþC Notation
124
Debugger Commands
125
The 187Bug Debugger Command Set
125
Conþguring the Board Information Block
129
This Appendix Covers
129
Setting Environment to Bug/Operating System
131
Disk/Tape Controller Modules Supported
143
Disk/Tape Controller Default Conþgurations
144
IOT Command Parameters for Supported Floppy Types
146
Network Controller Modules Supported
149
Introduction
157
Levels of Implementation
159
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