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Panasonic digital cellular phone operating instructions (100 pages)
Summary of Contents for Panasonic EB-GD90
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Order Number: MCUK990801G8 Technical Guide GD90 Personal Cellular Telephone Handheld Portable EB-GD90 Specification 900 MHz 1800 MHz Frequency range Tx: 890 - 915 MHz Tx: 1710 - 1785 MHz Rx: 935 - 960 MHz Rx: 1805 - 1880 MHz Tx/Rx frequency separation...
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This Technical Guide is copyright and issued on the strict understanding that it is not to be reproduced, copied, or disclosed to any third party, either in whole or part, without the prior written consent of Matsushita Communication Industrial UK Ltd. Every care has been taken to ensure that the contents of this publication give an accurate representation of the equipment.
INTRODUCTION 1.1 Purpose of this Guide This guide contains technical information for the Panasonic GD90 personal cellular telephone system operating on the GSM network. Procedures for installing, operating and servicing (e.g. disassembly and testing) the telephone system are provided in the associated Service Manual.
INTERFACES AND TEST POINTS INTERFACES AND TEST POINTS 2.1 Interfaces 2.1.1 Main and Keypad PCBs The interface between Main and Keypad PCBs is made via a 34-way connector as follows: D28V D28V nPOWKEY KEYBKLT PAGING_LED LCD_GRN LCD_RED CHARGING_LED A(1) nRESET CS_LCD KBC(4) KBR(3)
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INTERFACES AND TEST POINTS Signal Name MAIN <=> KEYPAD Function Connection D(5) <==> MPU Data bus (5) D(6) <==> MPU Data bus (6) D(7) <==> MPU Data bus (7) REC_P ==> Receiver Positive Output REC_N ==> Receiver Negative Output GD90 has two external connectors: a multi-way connector for use with a handsfree data;...
INTERFACES AND TEST POINTS Name H/H <=> EXT Total Function H/H Circuit EXT-PWR <== Power supply for battery charging, Power ON/ Off control and accessory control circuits. Trickle Charge Circuit Voltage: 5.8 ± 0.2 V Power On/Off Control Circuit Rapid Charge Circuit Current: 650 ±...
INTERFACES AND TEST POINTS Name H/H <=> EXT Total Function H/H Circuit ==> Ground connection of Dual Charger Refer to pin 1 ==> Ground connection of Dual Charger Refer to pin 1 ==> Ground connection of Dual Charger Refer to pin 1 CHARGE_ON <=>...
RF OVERVIEW RF OVERVIEW 3.1 Introduction 3.1.1 General Specifications GD90 is a Dual Band product incorporating two switchable transceivers, one for the GSM900 band and another for the GSM1800 (DCS1800) band. The transmit and receive bands for the mobile are given in the table below: GSM900 890-915 MHz 935-960 MHz...
RF OVERVIEW 3.2.3 Antenna The antenna is a fixed helical type. A mechanical RF switch is used to route the RF signal from the external antenna for handsfree operation and test purposes. 3.2.4 Transmit and Receive The transmit and receive paths of GD90 are covered in their own specific chapters later in this manual. 3.3 RF &...
TRANSMITTER TRANSMITTER 4.1 Introduction This section provides a technical description of the transmitter circuit of the RF circuit. A circuit diagram of the whole system is provided in the Service Manual. The uplink frequencies for the GSM 900 and GSM 1800 can be calculated as follows: 4.1.1 Uplink Frequencies GSM 900 CHANNEL UPLINK FREQUENCIES (MHz)
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TRANSMITTER 4.2.1 GSM 900 Signal Levels Typical case Worst case Dual TX Power ATTN Excitor Coupler sprit Diplexer 10083-1 Figure 2.2: GSM 900 Transmitter Signal Levels 4.2.2 GSM 1800 Signal Levels Typical case Worst case Dual TX Power ATTN Excitor Coupler sprit Diplexer...
RECEIVER RECEIVER 5.1 Introduction This Section provides a technical description of the receiver section of the RF circuit. A complete circuit diagram is provided in the Service Manual. The downlink frequencies for the GSM 900 and GSM 1800 bands can be calculated as follows: 5.1.1 Downlink Frequencies GSM 900 CHANNEL DOWNLINK FREQUENCIES (MHz)
RECEIVER 5.2 Functional Description The main building block for the Dual Band Receiver is the Hitachi Bright2 IC. The receiver is a double superhet type with the 1st IF at 225 MHz and 2nd IF at 45 MHz. The intermediate frequencies are common to both frequency bands. The Rx IC contains the following stages: Gain controlled 1st mixer for GSM 900 band.
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RECEIVER 5.2.2 GSM 900 Signal Levels The signal levels through the receiver IC for the GSM 900 band are given below. Typical Case Worst Case Large Signal 10.0 -10.0 -20.0 -30.0 -40.0 -50.0 -60.0 -70.0 -80.0 -90.0 -100.0 -110.0 -120.0 DIPLEX + IF FL Demod...
BASEBAND OVERVIEW BASEBAND OVERVIEW 6.1 Introduction The main Baseband circuitry is located with the RF circuits on the Main PCB, while the baseband sub-circuits, comprising keys and LCD backlights, are located on the Keypad PCB. A metallised plastic chassis is used to separate the Main and the Keypad PCBs. The continuous chassis design is important for EMC purposes.
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BASEBAND OVERVIEW 6.2.1 Keypad The Keypad has a 5 x 5 matrix in rows and columns, allowing 25 keys to be scanned. Each row has a built-in pull-up resistor and the column line outputs are selected low. On a key press, the row input is pulled low by the corresponding column generating a keypad interrupt.
BASEBAND OVERVIEW 6.2.3 Time Processing Unit (TPU) The TPU provides the GSM TDMA timing requirements for the system, external timing signals are provided by an area of Microcode within the GEMINI chip. GEMINI Pin Description VEGA BENA VEGA BCAL VEGA BULON VEGA BDLON RF PA_ON RF PCNnGSM...
BASEBAND OVERVIEW 6.2.6 Real Time Clock The Real Time Clock (RTC) and Alarm function is provided by U604 running at 32,768 MHz. It interfaces to the CPU via a four serial lines: CE (chip enable), SCLK (serial clock), SI (serial input) and SO (serial output). To maintain power to the clock when the main battery is removed, a small rechargeable back-up battery (VBACKUP) is used.
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BASEBAND OVERVIEW 6.2.8 Speaker Because Vega runs from a 2.7 V supply, a low impedance (dynamic) speaker must be used. The GSM standard requires that the receive audio frequency response in Handheld use must fit within the mask shown below. GD90 is designed to meet Handheld requirements with a type 1 artificial ear.
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BASEBAND OVERVIEW 6.2.9 Buzzer The volume level of the buzzer is defined by the 6 bit PWM register setting in GEMINI I/O. The buzzer tone is then superimposed on this level using software. Timer 1 in GEMINI is used to time the period between switching the buzzer on and off to make the tone. For more complex buzzer ringing tones, the buzzer volume level can also be altered after each time-out of Timer 1.
GEMINI GEMINI 7.1 Introduction Gemini contains the DSP, CPU and GSM timing functions and many peripheral functions. The software for the DSP is contained in masked ROM. 7.2 Functional Description SPEECH BASEBAND INTERFACE INTERFACE TDMA TIMER CORE 10087-1 Figure 7.1: GEMINI Block Diagram 7.2.1 Digital Signal Processor The Digital Signal Processor (DSP) core is compatible with the Texas Instruments TMS350C5xx family of DSPs.
GEMINI 7.2.3 Memory Interface The memory interface allows the 32 bit CPU to access 16 and 8 bit devices, and allows the addition of wait states to memory access. The memory interface allows between 0 and 7 wait states to be added. The ROM area is hardware write protected, a FLASH write enable bit in the ROM wait state configuration register can be used to enable write access the ROM area.
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GEMINI 7.2.5 General Purpose I/O The general purpose I/O includes keypad scanning, two PWM ports and 16 general purpose I/O lines. The I/O lines are multiplexed onto other functions, if I/O is selected the other function is unavailable. I/O Pin Assignments Signal Name Pin No.
VEGA VEGA 8.1 Introduction VEGA contains the interface circuits to the Audio, RF and auxiliary analogue functions for the baseband circuit. 8.2 Functional Description TIMING JTAG SIGMA FILTER DELTA 10 bit FILTER I DAC BURST GMSK STORE 10 bit FILTER Q DAC SIGMA FILTER...
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VEGA 8.2.4 AFC Control The 13 MHz system clock frequency is controlled by a 13 bit sigma-delta D/A in the VEGA chip 3/5V 1-BIT DAC 13-BIT DIGITAL & LOW-PASS MODULATOR FILTER OUTPUT SWING CONTROL VTCXO RINT1 RINT2 PROGRAMMATION REGISTER CEXT 10092-1 Figure 8.5: AFC block diagram 8.2.5 Audio...
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VEGA Voice Downlink Path Auxiliary AUXO Amplifier EARP Smoothing From voice Earphone Sigma_Delta SINC One bit Filter Bandpass serial Interpolation Volume Cont interface EARN Modulator Filter Amplifier Filter & PGA fs1=1MHz fs2=40KHz fs3=8.0KHz 10094-1 Figure 8.7: Voice DAC block diagram 8.2.6 Auxiliary A/D VEGA provides five A/D inputs.
POWER SUPPLIES POWER SUPPLIES 9.1 Introduction This section describes the Power Supply Unit (PSU) used on the GD90 Main PCB and the method by which it is controlled. The Battery life during GSM1800 operation benefits from lower transmit power and higher PA efficiency and is therefore more efficient than when operating in GSM900.
POWER SUPPLIES 9.3.2 Power-up Sequence The power-up sequence can be initiated by pressing the power key, or by applying a power source to the EXT_PWR signal line. Both enable the linear regulators and the CPU becomes active. The CPU must then check the battery condition; if the phone is not required to power-down or sleep immediately, the result must be OK or LOW.
POWER SUPPLIES 9.5 Power Management The power supply circuit supplies regulated power to the base-band parts, controls battery charging and monitors battery usage. The Power Management section consists of five parts as follows: Power Source. Power On/Off Control & Power Source Failure. Voltage Regulation.
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VBAT EXT PWR A2V8 Trickle Charge Battery Circuit 3.8V MCU SERIAL INTERFACE Vega Gemini U602 U601 VBAT EXT_PWR BAT_ID nR eset BAT TEMP BAT_VOLT 13MHz nADP DETECT CURRENT Rapid Protection 13MHz NiM H:GND VSET nHF_ON Charge Circuit nRESET CHARGE_ON Control & Battery ADCON Monitoring...
POWER SUPPLIES 9.5.2 Power On/Off Control The hardware model for the Power On/Off Control and Power Source Failure functions can be expressed by the following boolean expression and logic diagram. On/Off = VBAT + (LOGIC_PWR · RTC_INT · (nLVA_INT + (nPOWKEY · nIGNITION · nEXT_PWR))) nLVA_INT nPOWKEY nIGNITION...
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POWER SUPPLIES D1V8 : Power supply for GEMINI process version 1833C07 (ARM, DSP and ASIC) Voltage 1.8 V ± 3 % Current 120 mA max. A2V8 : Baseband power supply for Analogue circuitry (VEGA and Voice-Memo) Voltage 2.8 V ± 3 % Current 100 mA max.
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POWER SUPPLIES 9.5.6 Accessory Control GD90 can detect accessories connected to its I/O connector and control the power supply to them. These are controlled by the signals detailed in the following table. Inputs Outputs Peripherals nON_HOOK nLogic_ HF_ON Charger Ext_Pwr Ignition nHFsense adp_sense...