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LG 50PG20 Training Manual
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LG 50PG20 Training Manual

LG 50PG20 Training Manual

Advanced single scan troubleshooting
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See also: Troubleshooting Manual , Owner's Manual
Training Manual
50PG20 Plasma Display
50PG20 Plasma Display
Advanced Single Scan Troubleshooting
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Summary of Contents for LG 50PG20

  • Page 1 Training Manual 50PG20 Plasma Display 50PG20 Plasma Display Advanced Single Scan Troubleshooting 720p 720p...
  • Page 2 Section 2 Circuit Board Operation, Troubleshooting and Alignment of : • Switch mode Power Supply • Y SUS Board • Y Drive Boards • Z SUS Board • Control Board • X Drive Boards • Main Board Plasma Spring 2009 50PG20...

  • Page 3: Overview Of Topics To Be Discussed

    Overview of Topics to be Discussed Overview of Topics to be Discussed 50PG20 Plasma Display Section 1 This Section will cover Contact Information and remind the Technician of Important Safety Precautions for the Customers Safety as well as the Technician and the Equipment.

  • Page 4: Preliminary Matters (The Fine Print)

    When servicing this product, under no circumstances should the original design be modified or altered without permission from LG Electronics. Unauthorized modifications will not only void the warranty, but may lead to property damage or user injury.

  • Page 5: Esd Notice

    Increase the separation between the equipment and the receiver; Connect the equipment to an outlet on a different circuit than that to which the receiver is connected; or consult the dealer or an experienced radio/TV technician for help. Plasma Spring 2009 50PG20...

  • Page 6: Contact Information

    USA Website (GCSC) aic.lgservice.com Customer Service Website us.lgservice.com LG CS Academy lgcsacademy.com LG Web Training lge.webex.com Published March 2009 by LG Technical Support and Training LG Electronics Alabama, Inc. 201 James Record Road, Huntsville, AL, 35813. Plasma Spring 2009 50PG20...

  • Page 7: Section 1: Plasma Overview

    1. Check the appearance of the Replacement Panel and Circuit Boards for both physical damage and part number accuracy. 2. Check the model label. Verify model names and board model matches. 3. Check details of defective condition and history. Example: Y Board Failure, Mal-discharge on screen, etc. Plasma Spring 2009 50PG20...

  • Page 8: Basic Troubleshooting Steps

    The final step is to correct the problem. Be careful of ESD and make sure to check the DC Supplies for proper levels. Make all necessary adjustments and lastly always perform a Safety AC Leakage Test before returning the product back to the Customer. Plasma Spring 2009 50PG20...
  • Page 9 50PG20 Product Information 50PG20 Product Information 720p 720p This section of the manual will discuss the specifications of the 50PG20 Advanced Single Scan Plasma Display Panel. Plasma Spring 2009 50PG20...
  • Page 10 • Fluid Motion • 3x HDMI™ V.1.3 with Deep Color • AV Mode (Cinema, Sports, Game) • Clear Voice • LG SimpLink™ Connectivity • Invisible Speaker System • 100,000 Hours to Half Brightness (Typical) • PC Input Plasma Spring 2009...
  • Page 11 10.2Gbps) than that of HDMI 1.2, delivering a broader range of colors, and also drastically improves the data-transmission speed. Invisible Speaker Personally tuned by Mr. Mark Levinson for LG TAKE IT TO THE EDGE newly introduces ‘Invisible Speaker’ system, guaranteeing first class audio quality personally tuned by Mr. Mark Levinson, world renowned as an audio authority.
  • Page 12 50PG20 Specifications Logo Familiarization 50PG20 Specifications Logo Familiarization AV Mode "One click" - Cinema, Sports, Game mode. TAKE IT TO THE EDGE is a true multimedia TV with an AV Mode which allows you to choose from 3 different modes of Movies, Video Games and Sports by a single click of a remote control.

  • Page 13: Dolby Digital

    Digital is the reigning standard for surround sound technology in general and 5.1-channel surround sound in particular. LG SIMPLINK™ MULTI-DEVICE CONTROL Allows for convenient control of other LG SimpLink products using the existing HDMI connection. FLUIDMOTION (180 Hz Effect) Enjoy smoother, clearer motion with all types of programming such as sports and action movies.
  • Page 14 50PG20 Specifications FluidMotion Familiarization 50PG20 Specifications FluidMotion Familiarization FluidMotion (180 Hz Effect) Enjoy smoother, clearer motion with all types of programming such as sports and action movies. The moving picture resolution give the impression of performance of up to 3x the panels actual refresh rate.
  • Page 15 50PG20 Remote Control 50PG20 Remote Control BOTTOM PORTION TOP PORTION Plasma Spring 2009 50PG20...

  • Page 16: Rear And Side Input Jacks

    Rear and Side Input Jacks Rear and Side Input Jacks Plasma Spring 2009 50PG20...
  • Page 17 If you do not want to download the upgrade file, please press the arrow key to reach CANCEL on the screen. Then, press the ENTER key on your remote <USB download main screen> Your File name and version number will differ. Use this just for reference. Plasma Spring 2009 50PG20...
  • Page 18 50PG20 Dimensions 50PG20 Dimensions Plasma Spring 2009 50PG20...

  • Page 19: Disassembly Section

    720p This section of the manual will discuss Disassembly, Layout and Circuit Board Identification, of the 50PG20 Advanced Single Scan Plasma Display Panel. Upon completion of this section the Technician will have a better understanding of the disassembly procedures, the layout of the printed circuit boards and be able to identify each board.
  • Page 20 To remove the back cover, remove the 26 screws (The Stand does not need to be removed). Indicated by the arrows. PAY CLOSE ATTENTION TO THE TYPE, SIZE AND LENGTH Of the screws when replacing the back cover. Improper type can damage the front. Plasma Spring 2009 50PG20...

  • Page 21: Pwb Layout

    Panel Voltage Label Z-SUB Y Drive “Upper” Power Supply Y-SUS Z-SUS Y Drive “Lower” Main “Digital” Control “Logic” Side Inputs Heat Sink Right “X” Center “X” Left “X” Rear Power Inputs Button Control Keys Invisible Speakers Plasma Spring 2009 50PG20...

  • Page 22: Disassembly Procedure For Circuit Board Removal

    Remove the 4 connectors going to the Flexible Ribbon Connectors for the Panel. Remove the 3 screws holding the PWB in place. Lift the PWB up to unseat the PWB from the screw Stand Off collars and pull the PWB away from the Y-SUS PWB connectors Plasma Spring 2009 50PG20...

  • Page 23: Main Board Removal

    Pay attention to the back side. Note: The rubber looking pad is actually a “Temperature Transfer Medium”. Be sure to remove this pad from the old PWB and place the pad back on the New PWB before installation. Plasma Spring 2009 50PG20...

  • Page 24: Circuit Board Removal

    This includes the Stand “A”. Before an X Board can be removed the Heat Sink Assembly “F” will also need Removal. Power Supply Y Drive Z-SUS Y-SUS Control “Logic” Y Drive Main “Digital” Right “X” Center “X” Left “X” Plasma Spring 2009 50PG20...
  • Page 25 Center X Drive: P242, P241, P232 P211, P201 through P206. Right X Drive: P331, P311, P503, P301 through P306. Remove the 4 screws for each PWB and remove the PWB. One of the screws supports two PWBs. Reassemble in reverse order. Recheck Va/Vs/VScan/-VY/Z-Drive. Plasma Spring 2009 50PG20...

  • Page 26: Signal And Voltage Distribution

    Signal and Voltage Distribution Signal and Voltage Distribution Plasma Spring 2009 50PG20...

  • Page 27: Section 2: Circuit Operation, Troubleshooting And Circuit Alignment Section

    SECTION 2: CIRCUIT OPERATION, TROUBLESHOOTING AND CIRCUIT ALIGNMENT SECTION CIRCUIT ALIGNMENT SECTION 50PG20 Plasma Display This Section will cover Circuit Operation, Troubleshooting and Alignment of the Power Supply, Y SUS Board, Y Drive Boards, Z SUS Board, Control Board, Main Board and the X Drive Boards.

  • Page 28: Panel Label Explanation

    (4) Adjusting Voltage DC, Va, Vs (12) Model Name (5) Adjusting Voltage (Set Up / -Vy / Vsc / Ve / Vzb) (13) Max. Watt (Full White) (6) Trade name of LG Electronics (14) Max. Volts (7) Manufactured date (Year & Month) (15) Max. Amps...
  • Page 29 1) When the Y-SUS PWB is replaced All label references are from a specific panel. Set- 2) When a “Mal-Discharge” problem is encountered They are not the same for every panel encountered. 3) When an abnormal picture issues is encountered Plasma Spring 2009 50PG20...
  • Page 30 Always refer to the Voltage Sticker located on the back of the panel, in • the upper Left Hand side for the correct voltage levels for the VA, VS, - VY, Vscan, and Z Bias as they will vary from Panel to Panel. Plasma Spring 2009 50PG20...
  • Page 31 Check the sticker on the upper left side to confirm origin of the Panel or the White Label on the Power Supply itself to identify the PWB P/N. We will examine the Operation of the EAY41360901 . Plasma Spring 2009 50PG20...
  • Page 32 Power Supply PWB Layout Power Supply PWB Layout P801 P802 Hot Ground Symbol represents a SHOCK Hazard P803 AC Det 5_V Det VS_ON RL_ON AUTO M5V_ON Plasma Spring 2009 50PG20...

  • Page 33: Switch Mode Power Supply Overview

    There are 2 adjustments located on the Power Supply Board VA and VS. The 5V VCC is pre-adjusted and fixed. All adjustments are made with relation to Chassis Ground. Use “Full White Raster” 100 IRE RV901 RV902 Plasma Spring 2009 50PG20...

  • Page 34: Switch Mode Power Supply Circuit Layout

    To Z-SUS Standby VA VR902 Source VA Source 380V Source 380V Fuse F801 16V, 12V, 5V 10Amp/230V Source Main Fuse F101 10Amp/230V P803 To MAIN AC Input CN 101 U701 Sub Micon AC Input No Connection Plasma Spring 2009 50PG20...

  • Page 35: Power Supply Basic Operation

    Board brings the VS-ON line high at Pin 20 of P803 on the SMPS Board which when sensed by the Sub Micon IC (U701) turns on the VA and VS Supplies (VA is brought high before VS). Plasma Spring 2009 50PG20...
  • Page 36 Graphical Graphical representation of representation of Power Supply turn on Power Supply turn on sequence. sequence. Plasma Spring 2009 50PG20...
  • Page 37 Microprocessor Side Microprocessor Side Control of the Switch Control of the Switch Mode Power Supply Mode Power Supply Next two Slides show sequential turn on sequence Plasma Spring 2009 50PG20...
  • Page 38 Microprocessor Side Microprocessor Side Control of the SMPS Step 1 Control of the SMPS Step 1 Plasma Spring 2009 50PG20...
  • Page 39 Microprocessor Side Control of the SMPS Step 2 Microprocessor Side Control of the SMPS Step 2 Plasma Spring 2009 50PG20...

  • Page 40: Power Supply Generic Troubleshooting Tips

    Audio would be present. If VS-ON went high and VS and VA where missing the problem could be caused by a failure on the SMPS or a circuit using these voltages. A Resistance check should narrow the possible failures quickly. Plasma Spring 2009 50PG20...

  • Page 41: Switch Mode Power Supply Static Test

    For a “Stand-Alone” static test for the Power Supply, apply the usual 2 100Watt light Bulbs test on the Vs output line for a simulated load. If the Power Supply operates in this condition, it is assured it can maintain its output power under load. Plasma Spring 2009 50PG20...
  • Page 42 100Ω ¼ watt resistor added from 5V STB (Pins 9 ~ 12) to M5V_ ON (Pin 21) brings the 5V VCC line high 100Ω ¼ watt resistor added from 5V STB (Pins 9 ~ 12) to VS _ON (Pin 20) brings the VA and VS Lines high Plasma Spring 2009 50PG20...
  • Page 43 STATIC TEST UNDER LOAD LIGHT BULB TEST STATIC TEST UNDER LOAD LIGHT BULB TEST Plasma Spring 2009 50PG20...
  • Page 44 Va : 65V Vs : 193V NA / -195 / 135 / NA / 100 Vs TP Pins 1 or 2 P801 Va TP TP Pins 6 or 7 P802 Use Chassis Ground Use Full White Raster Plasma Spring 2009 50PG20...
  • Page 45 All voltages from a working unit. Connector Pin Number Standby Resistance CN101 120VAC 120VAC 480K 1 and 3 P801 CONNECTOR "SMPS PWB" to "Y-SUS" P209 Label STBY Diode Mode 192V 192V .897V .897V Diode Mode readings taken with all connectors removed. Plasma Spring 2009 50PG20...
  • Page 46 Voltage and Resistance Measurements for the SMPS. All voltages from a working unit. P802 CONNECTOR "SMPS PWB" to “Z-SUS“ P3 Label STBY Diode Mode 192V 192V .897V .897V Diode Mode readings taken with all connectors removed. Plasma Spring 2009 50PG20...
  • Page 47 Voltage and Resistance Measurements for the SMPS from working unit (Page 1 of 2) P803 CONNECTOR Odd "SMPS" to "Main PWB" P701 Label STBY No Load Diode Mode 2.26V 1.7V 1.7V 5_V Det .15V 1.56V RL_On 4.5V 2.6V M5V_ON 3.2V 2.6V Diode Mode readings taken with all connectors removed. Plasma Spring 2009 50PG20...
  • Page 48 Voltage and Resistance Measurements for the SMPS from working unit (Page 2 of 2) P803 CONNECTOR Even "SMPS" to "Main PWB" P701 Label STBY No Load Diode Mode 2.6V 1.7V 1.7V AC Det 2.56V Vs_On 3.2V 2.7V AUTO 2.1V Diode Mode readings taken with all connectors removed. Plasma Spring 2009 50PG20...
  • Page 49 Relay opens, LED goes to red. Power Supply outputs 16V,12V and 5Vcc, drops to 0V after the relay opens. No Va or Vs. With Relay closed, 330V OK, then when relay opens, it drops to 155V. Plasma Spring 2009 50PG20...

  • Page 50: Operating Voltages

    V Set Down sets the Pitch of the Bottom Ramp of the Drive Waveform VSC (VScan) Set the amplitude of the complex waveform. 15V Used internally and routed out to Control board then to Z-SUS 5V FG 5V FG Routed out to the Y-Drive Board. (Floating Ground 5V) Plasma Spring 2009 50PG20...
  • Page 51 Floating Gnd Gnd FS502 125V 1.5A Floating Gnd 15V FS501 125V 1.5A Floating Gnd 5V FS504 125V 1.5A 15V and Va to Center X PWB (All fuses read -90V) from chassis ground P210 FS503 (5V) 125V 5A Plasma Spring 2009 50PG20...

  • Page 52: Vsc And - Vy Adjustments

    Of PWB Upper Left Side Of PWB These are DC level Voltage Lower Adjustments. Waveform Left Side just for reference Of PWB -VY ADJ VSC ADJ VR501 VR502 VSC TP R202 Bottom of lower Y-Drive PWB Plasma Spring 2009 50PG20...
  • Page 53 Finally you will need to set the Trigger Level press the Trigger View and set the level as indicated in the picture below. VS_DA Located on the Control Board just above the AUTO Gen Test Points may be used as an external trigger source for locking the waveform on the Oscilloscope External Trigger Source Trigger Level Adjust Plasma Spring 2009 50PG20...
  • Page 54 Fig 3 Top: At 200uSec per/div. the signal for Vsetup is now clearly visible. It is outlined within the Waveform Area to be adjusted FIG3 Zoomed out Fig 3 Lower: At 20uSec per/division, the adjustment for Vsetup can be made. Plasma Spring 2009 50PG20...
  • Page 55 Fig 3 Lower: At 20uSec per/division, the adjustment for Vsetdn can be made. V SET DOWN set too high can cause shut down. Remove Area to be adjusted LVDS cable to allow set to remain on and realign Set-Dn Zoomed out Plasma Spring 2009 50PG20...
  • Page 56 Drive Waveform Test Point (Lower Y Drive PWB) Blow Up Drive Waveform Test Point (Lower Y Drive PWB) Blow Up Bottom of lower Y-Drive PWB Plasma Spring 2009 50PG20...
  • Page 57 VR 602 V SET DN VR 601 V SET DOWN set too high can cause shut down. Observe the “Time” Portion of the waveform Observe the “Peak” Portion of the waveform Bottom of lower Y-Drive PWB Plasma Spring 2009 50PG20...
  • Page 58 Peeking too late and alters the start of the Vset DN phase. Very little alteration to the picture, the wave form indicates a distorted Vset UP. The peek widens due to the Vset UP peeking too quickly. Plasma Spring 2009 50PG20...
  • Page 59 To correct, remove the LVDS from control PWB and make necessary adjustments. All of the center washes out due to increased Vset_DN time. The center begins to wash out and arc due to decreased Vset DN time. Plasma Spring 2009 50PG20...
  • Page 60 NOTE: If Vset DN too high, this set will go to excessive bright, then shutdown. Notice that the amplitude of the Set To correct, remove the LVDS from Control PWB and Down (Bottom portion) peak begins to make necessary adjustments. decrease. Plasma Spring 2009 50PG20...
  • Page 61 VSC Too High or Low VSC Too High or Low Panel Waveform Adjustment When VSC is too high The image will display some distortion in Both of these are DC adjustments a quickly changing image. When VSC is too low Plasma Spring 2009 50PG20...

  • Page 62: Ysus Block Diagram

    Floating 5V waveform Generates Vsc and -Vy Components generate from Vs by transformer. Sustain Waveform Also controls Ramp up/down. FETs amplify Sustain IPMs Waveform Transfer Waveform Display Panel to Y Drive Boards Center X Board Plasma Spring 2009 50PG20...
  • Page 63 SET_UP 0.26V 2.87V Pins 40~44 are 5V B+ to the Control PWB. Pins 45~46 are not used. Diode Mode readings taken with all connectors removed. Pins 47~50 is 16V output. To Control board then to Z-SUS. Plasma Spring 2009 50PG20...
  • Page 64 Roughly the first 39 pins dedicated to Y-SUS. Pins 40~44 are 5V B+ to the Control PWB. Pins 45~46 are not used. Diode Mode readings taken with all connectors removed. Pins 47~50 is 16V output. To Control board then to Z-SUS. Plasma Spring 2009 50PG20...

  • Page 65: Ysus P209 Plug Information

    P209 Plug Information Voltage and Resistance Measurements for the Y SUS Board P209 CONNECTOR "Y-SUS" to P801 "Power Supply PWB" Label STBY Diode Mode 192V 192V 0.897V 0.897V Diode Mode readings taken with all connectors removed. Plasma Spring 2009 50PG20...
  • Page 66 P210 CONNECTOR "Y-SUS PWB" to P242 "X-Drive Center" Label STBY Diode Mode Va_C Va_C VPP_Out_XR 62.4V VPP_Out_XR 62.4V VPP_Out_XL 62.3V VPP_Out_XL 62.3V VPP_Out 63.3V VPP_Out 63.3V +15V 15.9V 0.95V +15V 15.9V 0.95V Diode Mode readings taken with all connectors removed. Plasma Spring 2009 50PG20...

  • Page 67: Y Drive Explained

    The Y Drive Boards supply a waveform which selects the horizontal electrodes sequentially. * 50PG20 uses 8 DRIVER ICs on 2 Boards (TOP, BOTTOM: 4 each) 50G1 Panel has 768 Vertical lines of resolution (Horizontal Grids determine V Resolution) 4 Ribbons (Tabs) separated into 2 = 192 grids per tab.
  • Page 68 5 Volts (Floating Ground) 5VFG input also enters the Bottom Y Drive Board at P200. Logic Signals from the Y SUS Board Floating Ground Floating Ground Scan P100 IC110 IC120 IC130 IC140 Logic Signals to the Bottom Y Drive Board Floating Ground Floating Ground Scan P200 IC203 IC204 IC201 IC202 Plasma Spring 2009 50PG20...
  • Page 69 To reinstall the Ribbon Cable carefully slide it back into the slot see ( Fig 2 ), be sure the Tab is seated securely and press the Locking Tab back to the locked position see ( Fig 3). Plasma Spring 2009 50PG20...

  • Page 70: Y Drive Flexible Ribbon Incorrectly Seated

    Note the cable is crooked. In this case the Tab on the Ribbon cable was improperly seated at the bottom. This can cause bars, lines, intermittent lines abnormalities in the picture. Remove the ribbon cable and re-seat it correctly. Plasma Spring 2009 50PG20...
  • Page 71 Y Drive Upper Troubleshooting Y Drive Upper Troubleshooting Using the “Diode Test” on the DVM, check the pins for shorts or abnormal loads. READING TEST POINT Data Open Open Open Open Open Data-Out Open Open Open Data Data-Out Plasma Spring 2009 50PG20...
  • Page 72 Y Drive Upper Troubleshooting Using the “Diode Test” on the DVM, check the pins for shorts or abnormal loads. READING TEST POINT Data .78 V .63 V .63 V .63 V .63 V Data-Out .73V .53V .53V Data Data-Out Plasma Spring 2009 50PG20...
  • Page 73 Y Drive Upper Troubleshooting Y Drive Upper Troubleshooting Using the “Diode Test” on the DVM, check the pins for shorts or abnormal loads. Scan Drive Scan Drive Floating Ground Floating Ground READING READING 0.659V OPEN Plasma Spring 2009 50PG20...
  • Page 74 Y Drive Lower Troubleshooting Y Drive Lower Troubleshooting Using the “Diode Test” on the DVM, check the pins for shorts or abnormal loads. READING TEST POINT Data Open Open DATA Open Open Open Open Open Plasma Spring 2009 50PG20...
  • Page 75 Y Drive Lower Troubleshooting Y Drive Lower Troubleshooting Using the “Diode Test” on the DVM, check the pins for shorts or abnormal loads. TEST POINT READING .52V Data .52V DATA .78V .61V .62V .62V .62V Plasma Spring 2009 50PG20...
  • Page 76 Y Drive Lower Troubleshooting Y Drive Lower Troubleshooting Using the “Diode Test” on the DVM, check the pins for shorts or abnormal loads. READING OPEN “OL” READING 0.659V Floating Ground Floating Ground Scan Drive Scan Drive Plasma Spring 2009 50PG20...
  • Page 77 Indicated by Red outline BLACK LEAD ON RED LEAD ON “ANY” BUFFER IC OUTPUT LUG. READING “OPEN” Indicated by Red outline • Any of these output lugs can be tested. • Look for shorts indicating a defective Buffer IC Plasma Spring 2009 50PG20...

  • Page 78: Operating Voltages

    • DC Voltage and Waveform Test Points • Z BIAS Alignment • Resistance Test Points Operating Voltages Operating Voltages SMPS Supplied VA (Not used) Y-SUS Supplies 16V To Control Control Supplies 16V To Z-SUS Developed on Z SUS Z Bias Plasma Spring 2009 50PG20...
  • Page 79 Z-SUS Z Bias Test Point FS2 (5V) Bottom of either R49 or R50 125V 10A Discrete Discrete Components Components (No IPMs) (No IPMs) FS3 (16V) Z-SUB 125V 1.5A 16V and Logic Signals from the Control Board Plasma Spring 2009 50PG20...

  • Page 80: Z - Sus Waveform

    Z-SUS output. together. Scope probe connected 52V AC (RMS) use just as a check to to C404 top leg. see if Z-SUS is producing a output. Plasma Spring 2009 50PG20...
  • Page 81 Bottom of either R49 or R50 VR 8 adjust Z-Bias. It is measured from VZB Test Point to Chassis Ground, Adjust to the level indicated on the Voltage Sticker on the upper Left Hand side of the Panel. Plasma Spring 2009 50PG20...
  • Page 82 Z Bias Voltage is used to Bias the output circuits driving the Sustain and Erase Pulses, removing previous images from the PDP. Z-bias is measured from the Vzb TP on the Z -SUS Board and adjusted by VZB Adj. Plasma Spring 2009 50PG20...
  • Page 83 Z-SUS Control Board Receive M5V, VA, VS Distributes Logic Note: VA not used by Z-SUS board. Signals Drive Circuit amplifies Z-Sustain waveform NO IPMs FETs amplify Display Panel Drive waveform Via FPC (flexible printed circuit ) Plasma Spring 2009 50PG20...
  • Page 84 SUS Noise Dampening Pads (Back Side) SUS Noise Dampening Pads (Back Side) Make sure the replacement PWB comes with the noise reducing pads. If they do not, contact parts about sending the two pads. Plasma Spring 2009 50PG20...
  • Page 85 Control PWB. SUS-DN 2.69V SUS-UP 2.69V ER-DN ZBIAS 0.48V 2.85V ZB-CON 0.27V 2.85V ER-UP 0.1V 2.85V ENABLE 0.06V 2.85V none none 2.85V none 1.93V 2.85V none 2.66V 0.66V none Diode Mode readings taken with all connectors removed. Plasma Spring 2009 50PG20...
  • Page 86 P3 CONNECTOR "Z-SUS" to P802 "Power Supply PWB" Label STBY Diode Mode 192V 192V Note: Va is not Used on the Z-SUS board, It is an Open connection 1.3V 1.3V Diode Mode readings taken with all connectors removed. Plasma Spring 2009 50PG20...
  • Page 87 Y SUS Supplied 5V VCC Developed on the 1.8V Control board (2) 3.3V Supplied Supplied 15V supplied to Control board from the Y-SUS board. But routed through Control board to Z-SUS. 15V not used by the Control board. Plasma Spring 2009 50PG20...
  • Page 88 P163 LVDS IC121 Temp P164 P131 LEDs P121 F111 For Software Upgrades F112 P160 IC212 IC101 IC133 P111 IC201 To Y-SUS IC211 IC213 Pins inverted On Y-SUS IC171 IC122 Auto Gen Test Pattern P151 P161 P162 Plasma Spring 2009 50PG20...
  • Page 89 Confirm B+ to Is running Control PWB Quick observation Of Temp. LEDs Check 5V Tell if the Control Board is running. Confirm B+ to Control PWB VS_DA Control PWB Check 3V ~ 3.3V 15V and 5V From Y-SUS Plasma Spring 2009 50PG20...
  • Page 90 If there is a picture of cycling colors, the Y-SUS, Y-Drive, Z-SUS, Power Supply, Control PWBs and Panel are all OK. Same test for (2) to tell if the No Video is caused by the Main PWB. Plasma Spring 2009 50PG20...
  • Page 91 ” Checking the Crystal “ Clock ” 50Mhz Check the output of the Oscillator package. The frequency of the sine wave is 50 MHZ. Missing this clock signal can halt operation of the unit 500mV 40ns Plasma Spring 2009 50PG20...

  • Page 92: Control Lvds Signals

    Menu Button “on” and “off” with the Remote Control or Keypad. Loss of these Signals would confirm the failure is on the Main Board! Menu (OSD) ON Menu (OSD) Off Example of Normal Signals measured at 200mv/cm at 5µs/cm. Plasma Spring 2009 50PG20...

  • Page 93: Control Pwb Signal Block

    16 line PANEL 2 Buffer 256 X 16 = 4096 Outputs 4096 / 3 = 1365 (R G B) per TCP Vertical Grids = Horizontal 128 Lines per Buffer Resolution 256 Lines output Total per TCP Plasma Spring 2009 50PG20...
  • Page 94 Pin configuration is VZD-SEL inverted on the Z-SUS PWB Z-BIAS 0.06V 1.28V Z-ENABLE 0.1V 1.28V 0.27V 1.28V none 0.48V 1.28V none none 15.9V none 1.15V 15.9V none 1.15V Diode Mode Readings taken with all connectors removed. Plasma Spring 2009 50PG20...
  • Page 95 SUS Slide 1 of 3 Label Explanation Control Connector P111 to P102 on the Y SUS Slide 1 of 3 Label Explanation LABELS P160 is a 60 Pin but the 50PG20 FL111 and FL112 5V Fuse uses only 50 Pins P111 but P111 is covered in Silicone so P160 pins are used for description below.
  • Page 96 Pins 17, 18, 19, 20 and 21 Deliver +5V to hash mark. the Control PWB from the Y-SUS. Easy to check using 20 hash mark. No problem making a voltage reading since +5V Label 17~21 connectors are the same voltage. Pin 60 Plasma Spring 2009 50PG20...
  • Page 97 1.37V SLOPE_RETE 1.37V DATA 0.6V 1.37V Z-BIAS 1.71V DET_LEVEL 1.37V OSC2 1.37V Z-ENABLE DELTA_Vy 0.16V 1.37V OSC1 1.37V 4.75V 1.11V PASS_TOP 0.2V 1.37V 0.76V 1.37V 4.75V 1.11V 4.75V 1.11V Set_DN2 0.2V 1.37V 3.2V 1.37V 4.75V 1.11V Plasma Spring 2009 50PG20...
  • Page 98 Control PWB Plug P121 “ LVDS Plug ” Location and Explanation Pins are very close together making voltage checks risky. Use P302 on the Main PWB for checks. P121 LOCATION CONTROL PWB Shows connector location on the Control PWB Plasma Spring 2009 50PG20...
  • Page 99 1.10V 1.10V 1.15V 1.10V 1.26V 1.10V 1.10V 1.10V 1.10V 1.10V 0.21V 1.10V 1.10V 0.89V 0.56V 1.10V 5.29V 1.10V 1.26V 1.10V 1.2V 1.10V 3.29V 1.37V 0.89V 3.29V 0.89V 3.29V Diode Mode readings taken with all connectors removed. Plasma Spring 2009 50PG20...
  • Page 100 P161 P163 Resistance Readings As can be seen from the Picture below, these connectors are protected by coating and are too close together for safe readings. UNABLE TO READ THESE CONNECTORS, THEY ARE COVERED IN SILICON. Plasma Spring 2009 50PG20...
  • Page 101 P331 P121 P233 P311 P101 P102 P103 P104 P201 P202 P203 P204 P205 P206 P301 P302 P303 P304 P305 P306 TCP IC TCP IC’s shown are part of the Ribbon Cable TCP = “Taped Carrier Package” Plasma Spring 2009 50PG20...
  • Page 102 X Drive Left PWB ( ABUS X Drive Left PWB ( ABUS TCP IC’s shown are part of the Ribbon Cable Plasma Spring 2009 50PG20...
  • Page 103 X Drive Center PWB ( ABUS X Drive Center PWB ( ABUS Plasma Spring 2009 50PG20...
  • Page 104 X Drive Right PWB ( ABUS X Drive Right PWB ( ABUS TCP IC’s shown are part of the Ribbon Cable Plasma Spring 2009 50PG20...
  • Page 105 Lift up the lock as shown by arrows. (The Lock can be easily broken. It needs to be handled carefully.) Pull TCP apart as shown by arrow. (TCP Film can be easily damaged. Handle with care.) Plasma Spring 2009 50PG20...
  • Page 106 Logic Control Board Taped Carrier Package To X-Board Connector Flexible 256 lines per TCP. 16 TCPs total. (6x6x4) Cable 4096 Total Vertical Lines divided by 3 (RGB per/pixel) 1365 Horizontal Pixel Count Heat Sink Plasma Spring 2009 50PG20...

  • Page 107: Tcp Testing

    TCP Testing TCP Testing On any Gnd Look for any ribbon 10,11,12,13,14,27,28,2 9,30,37,38,39,40,41 Damage. Cracks, folds On any Va Pinches, scratches, etc… (4,5,6,7) or (44,45,46,47) Typical Reading 0.65V Opposite reads open Plasma Spring 2009 50PG20...
  • Page 108 X Board Voltage Distribution RGB Address Signals out to TCP X Board Voltage Distribution IC’s NOTE: VPP will meter slightly lower than VA. VPP is used to control current draw depending on color presence for that TCP to display. Plasma Spring 2009 50PG20...

  • Page 109: Tcp Visual Observation. Damaged Tcp

    Generate abnormal vertical bars c) Cause the entire area driven by the TCP to be “All White” d) Cause the entire area driven by the TCP to be “All Black” e) Cause a “Single Line” defect Plasma Spring 2009 50PG20...
  • Page 110 Some are even Silicon covered which prevents the ability to read. With these connectors, Check carefully for their seating accuracy. Improper seating can lead to many different symptoms. Lines, bars, noise, ect…. All Vertical in nature. Plasma Spring 2009 50PG20...
  • Page 111 P211 CONNECTOR "X Center PWB" to P311 "X-Left" Label STBY Diode Mode VPP_Out .15V VPP_Out .15V 61.8V VPP_Out .15V 61.1V VPP_Out .15V 62.2V +15V_R 2.91V VPP_Out Voltages vary with video content Diode Mode readings taken with all connectors removed. Plasma Spring 2009 50PG20...
  • Page 112 P311 CONNECTOR "X Left PWB" to P211 "X-Center" Label STBY Diode Mode +15V_R VPP_Out .15V 62.2V VPP_Out .15V 61.1V VPP_Out .15V 61.8V VPP_Out .15V VPP_Out Voltages vary with video content Diode Mode readings taken with all connectors removed. Plasma Spring 2009 50PG20...
  • Page 113 P242 CONNECTOR "X-Drive C PWB" to P210 "Y-SUS" Label STBY Diode Mode Va_C Va_C VPP_Out_XR 62.4V VPP_Out_XR 62.4V VPP_Out_XL 62.3V VPP_Out_XL 62.3V VPP_Out 63.3V VPP_Out 63.3V +15V 15.9V +15V 15.9V Diode Mode readings taken with all connectors removed. Plasma Spring 2009 50PG20...
  • Page 114 Gently pry the locking mechanism upward on all TCP connectors P101 ~ P104 P201~P206 P301~P306 Lift Evenly Carefully lift the TCP ribbon up and off the cushion and out of the way. TCP on Flexible ribbon cable Flexible ribbon cable Cushion Plasma Spring 2009 50PG20...
  • Page 115 • DC Voltage and Waveform Checks • Resistance Measurements SMPS Supplied Operating Voltages Operating Voltages Developed 2.5V on the Main 3.3V (2) Board Plasma Spring 2009 50PG20...
  • Page 116 Pin 16 LD400 IC100 Q706 Pin 1 Micro Tuner X400 HDMI 3 LD703 25 Mhz X100 12 Mhz P303 RGB/ RS232 Front Controls In 3 OPTICAL AUDIO CN701 HDMI inputs A/V Component Inputs A/V Composite inputs Plasma Spring 2009 50PG20...
  • Page 117 IC709 IC705 IC701 P302 IC702 IC706 IC708 IC501 P303 IC805 JK501 Be sure to prevent the PWB from touching the frame while the PWB is turned over. Use a piece of cardboard or towel to insulate. Plasma Spring 2009 50PG20...
  • Page 118 Video Pin 16 On Unlocked Off Locked Pin 14 Audio SIF Pin 14 Pin 8 SCL Pin 8 IC400 Pin 7 SDA Pin 7 Tuner Controller Pin 3 +5V Pin 3 Pin 1 X400 Tuner Controller Osc. Plasma Spring 2009 50PG20...
  • Page 119 1.16V 1.25V 1.16V 1.21V 1.16V 1.27V 1.16V 1.25V 1.16V 1.22V 1.16V 1.21V 1.16V 1.24V 1.16V 1.18V 1.16V 1.24V 1.16V 0.93V 3.29V 1.5V 0.58V 3.29V Odd Pins Even Pins Diode Mode readings taken with all connectors removed. Plasma Spring 2009 50PG20...
  • Page 120 Voltage and Resistance Measurements for the Main Board P303 CONNECTOR "MAIN PWB" to "Front Keys" Label STBY Diode Mode 2.97V KEY2 3.29V 1.17V KEY1 3.29V 1.17V STBY_5V 0.79V RED_R 1.11V RED_G 2.84V 1.11V Diode Mode readings taken with all connectors removed. Plasma Spring 2009 50PG20...
  • Page 121 P701 CONNECTOR "Main" Odd Pins to P803 "SMPS PWB" Label STBY Diode Mode With Plug 2.87V 0.79V Without Plug 0.79V 5_V Det .15V 3.24V RL_On 4.5V M5V_ON 3.2V 1.21V Diode Mode readings taken with all connectors removed. Plasma Spring 2009 50PG20...
  • Page 122 Voltage and Resistance Measurements for the Main Board P701 P701 CONNECTOR "Main" Even Pins to P803 "SMPS PWB" Label STBY Diode Mode 2.8V With Plug 0.79V 0.79V Without Plug AC Det 2.79V Vs_On 3.2V 1.21V AUTO Diode Mode readings taken with all connectors removed. Plasma Spring 2009 50PG20...
  • Page 123 Main PWB Speaker Plug JK501 Voltages and Resistance Voltage and Resistance Measurements for the Main Board Speaker Plug JK501 CONNECTOR "Main" to "Speakers" STBY Diode Mode 2.58V 2.58V 2.58V 2.58V JK501 Main PWB Lower Left Diode Mode readings taken with all connectors removed. Plasma Spring 2009 50PG20...
  • Page 124 This section shows the 11X17 foldout that ’ s available in the Paper This section shows the 11X17 foldout that ’ s available in the Paper and Adobe version of the Training Manual. and Adobe version of the Training Manual. Plasma Spring 2009 50PG20...
  • Page 125 Z-SUS DRIVE WAVEFORM 50PG20 INTERCONNECT DIAGRAM Y-SUS DRIVE WAVEFORM VZ Bias (RAMP) SUS-UP During SMPS Test (Described below), P803 disconnected; 150Vp/p 1) P801 and P802 connected. Y-SUS and Z-SUS will produce sustain waveforms. 2) P801 connected P802 disconnected, Y-SUS will produce sustain waveform, Z-SUS does not.
  • Page 126 Time per division Trigger offset Volts per division Pin 22 - Menu off P302 P302 Pin 16 - Menu off Pin 12 - Menu off Pin 13 - Menu off Pin 19 - Menu off State State Ref # Ref # Menu Off Menu Off Menu On...
  • Page 127 End of Presentation End of Presentation This concludes the Presentation Thank You Plasma Spring 2009 50PG20...

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