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9.3.
Detailed Block Diagram (2/3)
JK4700
HDMI IN1
1
TMDS DATA
CLOCK
ANALOG VIDEO DATA
3
Q4512
Q4513
5
7
SUB3.3V
9
DTV12V
DCDC-CTL
11
STB5V
13
15
17
AUDIO_VCC
19
(SIDE)
A-BOARD
JK4702
JK4703
DIGITAL SIGNAL PROCESSOR
HDMI IN3
HDMI IN2
MAIN_L/R
DTV_L
DTV_R
IC4700
DDC_IIC0S
DDC_IIC3
HDMI
TMDS DATA
EQUALIZER
CLOCK
TMDS DATA
&SWITCH
CLOCK
TMDS DATA
SEL A/B
CLOCK
(Y/PB/PR,R/G/B/H/V CVBS)
sLD_IIC1
IC4701
3.3V
IC5000
DDR1.5V
IC8240,41
DDR3
SOS/RST/STB3.3V
Peaks RESET
STMIIC1
DC POWER CONTROL
IC1101
EEPROM
STBY
16kbit
SUB5V DET
STB3.3V
DCDC
STB RESET
SW_OFFDET
SOUND_SOS_DET
SOUND
DET
SOUND_SOS
OVP
X8002
IC8000
Peaks LDA2
(A Chip)
(D Chip)
DDC_IIC2
CLK
DDC_IIC0
AUDIO
A/D
PROCESSOR
SIF_IN
D/A
HDMI I/F
RECEIVER
SEL A/B
RESET(PA-NRST)
ARC_OFF
TS Parallel
ANALOG
VIDEO
I/F
VIDEO
PROCESSOR
DDR I/F
RESET(PD-XRST)
IC1100
RXD1
RXD1
TXD1
STM
GenX8
TXD1
STB+3.3V
RESET
SW_OFFDET
HDMI_CEC
HDMI_CEC_PU_ON
HDMI
5V DET0,2,3
DDC_IIC0
DDC_IIC2
DDC_IIC3
LVDS DATA
35
IC2301
AUDIO AMP
L(+)
STBY
L(-)
PWM
PWM
AUDIO
R(+)
OUT
OUT
MUTE
R(-)
PWM-READY
SOS DET
AUDIO_VCC
HP OUT
D/A
SUB3.3V
OPTICAL
SPDIF-OUT
AUDIO OUT
IC5604
SUB5V
AVDDH+3.3V
+3.3V
(A Chip)
IC5603
AVDD+3.3V
+3.3V
(A Chip)
27MHz
27MHz
IC8100
74MHz
33MHz
CLOCK
GEN A
VC27A
CN8850
SD DATA
SD DATA
SD
I/F
SD CARD
IC8703
JK8800
LAN
LAN
10BASE-T/
DATA
CONROL
LAN
LAN DATA
100BASE-TX
I/F
USB
DATA
USB DATA
USB
I/F
IC8700
(SIDE)
+3.3V
JK8701
IC8921
USB2
NAND
NAND
I/F
IC8701
FLASH
1Gbit
+3.3V
JK8700A
USB1
CPU BUS
I/F
IC8950
sLD_IIC1
EEPROM
32kbit
BUS
CONTROL
sLD_IIC0
sLD_IIC2
P17V
SUB_OP_5V
sLD_IIC1
CN0100
STMIIC1
FOR
FACTORY
USE
TH-L37D25A
A12
1
SPEAKER_L
2
3
SPEAKER_R
4
(SIDE)
JK3300
HEAD PHONE
D3300
DIGTAL
OPTICAL
AUDIO OUT
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