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Sony KE-42M1 Service Manual

Sony KE-42M1 Service Manual

Flat panel color tv
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MODIFICATION HISTORY
Ver.
DATE
1.0
2004. 6 Issued
1.1
2005.11 Addition of Taiwan, Hong Kong and Chinese Models.
Correction of Service parts.
MODEL NAME : KE-42M1/P42M1/
SERVICE MANUAL
PARTS No. : 9-878-250-02
* Blue characters are linking.
CONTENTS
(P.
49)
MV42A1/MV42M1

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Summary of Contents for Sony KE-42M1

  • Page 1 MODIFICATION HISTORY MODEL NAME : KE-42M1/P42M1/ MV42A1/MV42M1 SERVICE MANUAL PARTS No. : 9-878-250-02 * Blue characters are linking. Ver. DATE CONTENTS 2004. 6 Issued 2005.11 Addition of Taiwan, Hong Kong and Chinese Models. Correction of Service parts.
  • Page 2 KE-42M1/P42M1/MV42A1/MV42M1 PANEL MODULE SERVICE MANUAL PDP Module Name S42SD-YB03 KE-42M1 UC Model KE-42M1 Canadian Model KE-42M1 Taiwan Model KE-P42M1 AEP Model KE-MV42A1 Hong Kong Model KE-MV42M1 Chinese Model FLAT PANEL COLOR TV...

  • Page 3: Table Of Contents

    CONTENTS 1. OUTLINE ································································································································ 1-1. Model Name of Plasma Display ······························································································ 1-2. External View ·························································································································· 1-3. Specifications ·························································································································· PRECAUTIONS······················································································································ 2-1. Handling Precautions for Plasma Display ··············································································· 2-2. Safety Precautions for Service (Handling, prevention of electrical shock, measure against power outage, etc)······················...
  • Page 4 6. Operation Checks After Repair Service·············································································· 6-1. Check Items ···························································································································· 6-2. Check Procedure····················································································································· 7. Adjustment Procedure ········································································································· 7-1 Adjustment Spec. and locations ································································································· 7-2. Procedure·································································································································· DATA······································································································································ • Back Side (TCP type) ···················································································································· • Logic Main Block Diagram ············································································································· • Drive Waveform ·····························································································································...

  • Page 5: Outline

    1. OUTLINE 1-1. Model Name of Plasma Display MODEL : S42SD-YB03 1-2. External View < M1 = X Board + Y Board + Logic Board > - 3 -...

  • Page 6: Specifications

    1-3. Specifications Item Specification Pixel 852 (H) x 480 (V) pixels (1 pixel = 1 R, G, B cells) Number of Cells 2556 (H) x 480 (V) Pixel pitch 1095 (H) x 1110 (V) mm 0.365 (H) x 1.110 (V) mm Cell Pitch 0.365 (H) x 1.110 (V) mm 0.365 (H) x 1.110 (V) mm...

  • Page 7: Precautions

    2. PRECAUTIONS To prevent the risks of unit damage, electrical shock and radiation, take the following safety, service, and ESD precautions. 2-1. Handling Precautions for Plasma Display 2-2. Safety Precautions for Service (Handling, prevention of electrical shock, measure against power outage, etc) 2-2-1.

  • Page 8: Precautions For Servicing Electrostatic Sensitive Devices

    9) Check that the wires are correctly arranged and connected. Do not change the distances between the parts and the printed circuit board. Check that the AC power cord is not damaged. Keep heating parts away from lead wires and other parts. 10) Product safety indication : Some electrical circuits and devices have specific safety characteristics.
  • Page 9 5) Before removing the protective material from the lead of a new ESD, bring the lead into contact with the chassis or the circuit assembly that the ESD is to be installed on. 6) When handling an unpacked ESD for replacement, do not move around too much. Moving (legs on the carpet, for example) generates enough electrostatic to damage the ESD.

  • Page 10: Name And Function

    3. NAME and FUNCTION 3-1. Layout of Assemblies Board Logic Main X-Main Y-Main Y-Buffer (upper) Y-Buffer (lower) Logic E Buffer Logic F Buffer Logic G Buffer - 8 -...
  • Page 11 1. L-Main 5. Y-Buffer (lower) 2. X-Main 6. E-Buffer 3. Y-Main 7. F-Buffer 4, Y-Buffer (upper) 8. G-Buffer - 9 -...

  • Page 12: Block Diagrams

    3-2. Block Diagrams 3-2-1. Block Diagrams for Drive Circuit Operations <Drive Y Board> - 10 -...
  • Page 13 <Drive X Board> <Drive Waveforms> - 11 -...

  • Page 14: Logic Circuit Block Diagram

    3-2-2. Logic Circuit Block Diagram 3-3. Main Functions of Each Assembly 3-3-1. X-Main board The X-MAIN board generates a drive signal by switching the FET in synchronization with the Logic Main board timing, and supplies the X electrode of the panel with the drive signal through the connector.

  • Page 15: Y-Main Board

    3-3-2. Y-Main board The Y-MAIN board generates a drive signal by switching the FET in synchronization with the Logic Main board timing, and sequentially supplies the Y electrode of the panel with the drive signal through the scan driver IC on the Y-buffer board. This board, connected to the panel’s Y terminal, has the following main functions: 1) Maintain voltage waveforms (including ERC).

  • Page 16: Product/Serial Label Locations

    3-4. Product/Serial Label Locations Voltage information label Serial No. label Panel module label Panel Module Label Voltage information Label Serial No. Label (Voltage specification) - 14 -...

  • Page 17: Operation Checking After Rectification

    4. OPERATION CHECKING AFTER RECTIFICATION 4-1. Flow Charts 4-1-1. No voltage output Replace PSU and check driver B’D in advance (Refer to ‘4-1-2 No display’) LED (Green) RLY8001,8002 Go to ‘4-1-2 No Display’ Go to ‘4-1-2 No Display’ - 15 -...

  • Page 18: No Video

    4-1-2. No video (Each voltage is normal.) There is no strong association of the cause between no video and faulty board (Y-Main, X-Main or Logic Main). FUSE - 16 -...
  • Page 19 FUSE - 17 -...

  • Page 20: Abnormal Display (Abnormal Image Is Displayed)

    4-1-3. Abnormal display (Abnormal image is displayed) (Except sustain or address line problems) Y-MAIN, X-MAIN, Logic Main or circuits may be defective. FUSE - 18 -...
  • Page 21 FUSE - 19 -...

  • Page 22: Displayed.)

    4-1-4. Sustain Open (No horizontal stripes are displayed.) 4-1-5. Sustain Short (Some horizontal stripes are linked.) - 20 -...

  • Page 23: Displayed.)

    4-1-6. Address Open (No vertical stripes are displayed.) Logic Main, Logic Buffer, FFC, or TCP may be defective. - 21 -...

  • Page 24: Linked.)

    4-1-7. Address Short (Some vertical stripes are linked.) Logic Main, Logic Buffer, FFC, or TPC may be defective. - 22 -...

  • Page 25: Address Open

    4-2. Defects, Symptoms, and Defective Parts Condition Name Description Related Board No Voltage Output No power voltage is No Voltage Output supplied. Each power voltage is normal, but no No Display Y-MAIN, X-MAIN, Logic Main, Cables image is displayed. Abnormal Display Abnormal image is displayed on screen.
  • Page 26 Symptom Defect Cause / Description Combined cells: Multiple cells combined from side to side, or up and Combined down. cells/Dark dots Dark dots: A cell not lighting by receiving signals due to a foreign material or bubble, or abnormal ITO. Bright dots: A cell lighting abnormally due to a foreign material or...
  • Page 27 Defect : 6. Address (Vertical Stripe) Open Defect: 7. Address (Vertical Stripe) Short Symptom: A line or block does not light up in Symptom: Another color simultaneously appears because Address electrode direction (1 Line open, Block adjacent data recognizes the single pattern signal. Open).
  • Page 28 Defect: 8. Address Output Error Defect: 9. Sustain (Horizontal Stripe) Open Symptom: A defect other than Address Open and Symptom: One or more lines do not light up in Short. Data printout signal error occurring at a certain Sustain direction. gradation or pattern.
  • Page 29 Defect: 10. Sustain (Horizontal Stripe) Short Defect: 11. Dielectric material layer damage Symptom: Combined or adjacent lines are Short in Symptom: Burn caused by the damage of Address Sustain direction. The lines appear brighter than Bus dielectric layer appears in the panel others at Ramp gradation pattern or low gradation discharge/non-discharge area.
  • Page 30 Defect: 20. F/White Low Discharge Defect: 21. Weak discharge Symptom: Low discharge caused by unstable cells Symptom: Normal discharge, but cells appear darker occurring at Full White pattern of high (60 degrees) or due to weak light emission occurring mainly at low (5 normal temperature.
  • Page 31 Defect: 32. Remaining image Defect: 33. Abnormal noise Symptom: The previous pattern does not disappear Symptom: Panel or circuit board noise after a new pattern appears. 1) Noise caused by panel (exhaust pipe) damage Example) 50"HD module: Cross Hatch pattern (30 2) Noise caused by element vibration due to seconds) Full White Pattern Considered as...
  • Page 32 Defect Name: 37. Panel Damage Defect Name: 38. Exhaust Pipe Damage Symptom : Panel crack or break. No image appears Symptom: Crack or break of exhaust pipe. An image in some cases, depending on the damaged part and is partially lacking or the panel noise occurs, damage level.

  • Page 33: Disassembling/Reassembling

    5. DISASSEMBLING/REASSEMBLING 5-1. Tools/Measurements Electric screwdriver, Oscilloscope, Multi-meter, 5-2. Exploded View - 31 -...

  • Page 34: Removal Procedures

    P/NAME Y-Drive X-Drive Logic-Main Y-Buffer (UP) Y-Buffer (Lower) Logic-Buffer (E) Logic-Buffer (F) Logic-Buffer (G) 5-3. Removal Procedures 5-3-1. Removing the Logic PCB Ass'y board from the Chassis Base 1) Disconnect the FFC and other cables between the Logic board and the X and Y boards.

  • Page 35: Removing The Y-Buffer Board From The Chassis Base

    5-3-4. Removing the Y-BUFFER board from the Chassis Base 1) Disconnect the FPC from the Y-BUFFER board. 2) Remove the screws from the Y-BUFFER board using the electric screwdriver, and remove the board from the Chassis Base. 5-3-5. Removing the ADDRESS-BUFFER board from the Chassis Base 1) Remove the screws from the TCP heatsink, and remove the TCP heatsink from the ADDRESS-BUFFER board.

  • Page 36: Installation Procedures

    5-4. Installation Procedures 5-4-1. Installing the TCPs on the Logic Buffer 1) Install the Logic Buffer on the boss holes of the Chassis Base. 2) Stand the connector covers of the Logic Buffer vertically. 3) Connect the TCP film connectors to the Logic Buffer connectors horizontally. 4) Check that the TCP films are securely connected to the Logic Buffer connectors.

  • Page 37: Installing The Y-Main Ass'y Board On The Y-Buffer

    5-4-2. Installing the Y-Main Ass'y Board on the Y-Buffer Connector 1 Y-MAIN ASSY BOARD Y-BUFFER 5-4-3. Installing X-Main and Y-Main Ass'y boards on the Chassis Base Chassis Base F Type Y-MAIN ASSY BOARD X-MAIN ASSY BOARD - 35 -...

  • Page 38: Installing The Logic Pcb Ass'y Board On The Chassis Base

    1) Install the X-Main and Y-Main Ass'y boards onto the Chassis Base as shown in the figure on the previous page, using the following specified screws. Board Screw Number of screws X-MAIN M3 x L10 Y-MAIN M3 x L10 Y-BUFFER M3 x L10 2) The securing order is as follows: (1) center of each Main Board Ass'y, (2) right and left of the Main Board Ass'y, and (3) others.
  • Page 39 1) Install the Logic Main Board Ass'y onto the Chassis Base as shown in the figure on the previous page, using the following specified screws. Board Screw Number of screws LOGIC BOARD M3 x L10 2) The securing order is as follows: (1) center of the Logic Main Board Ass'y, (2) right and left of the Logic Main Board Ass'y, and (3) others.

  • Page 40: Operation Checks After Repair Service

    6. Operation Checks After Repair Service 6-1. Check Items xxxxx Check Item Specification Remarks Drive board Securely connected or tightened Y Buffer Module assemble check Logic and Logic Buffer Harness Securely connected Foreign materials No foreign materials 6-2. Check Procedure 1) Check visually the following: (1) the module is correctly assembled, (2) the connections have no problem, and (3) the grounding and easily short-circuited parts are not damaged.

  • Page 41: Procedure

    7. Adjustment Procedure 7-1. Adjustment Spec. and locations TCP Ramp Curve adjustment (Y-Board) 3’rd sub-field 1’st sub-field 2’nd sub-field Vset Adjustment: Vsch Adjustment: 10 uSec +/- 1 uSec by VR5002 40 volts +/- 1 volt by VR5004 (In 3 Sub field) 30 u Sec +/- 1 u Sec by VR5003 30 u Sec +/- 1 u Sec by VR5001 7-2.
  • Page 42 4) Vary VR5002 and set Vset to 10 uSec. +/- 1 uSec. (Vertical control should be set 2volts/Div or 5Volts/Div.) 5) Vary VR5003 and set Falling hold period to 30 uSec. +/- 1 uSec. 6) Adjust Horizontal controls and puck up “3 Sub-Field”.
  • Page 43 Appendix 2) Location of VR5001 to 5004, and test point of “Vsch” Y-Main board VR5004 VR5001 VR5003 VR5002 Vsch voltage test point - 41 -...
  • Page 44 Appendix 3) “Dip Switch” setting 1 1 1 1 2 2 2 2 3 3 3 3 4 4 4 4 1 1 1 1 2 2 2 2 3 3 3 3 4 4 4 4 < Internal > <External>...

  • Page 45: Data

    8. DATA 42”SD Back Side (TCP type) Scan Scan Buffer Buffer (UP) (UP) SMPS Main SMPS Main Main Main Scan Scan Buffer Buffer Logic Main Logic Main (Down) (Down) E Buffer F Buffer Buffer E Buffer F Buffer Buffer - 43 -...

  • Page 46: Logic Main Block Diagram

    42”SD Logic Main Block Diagram - 44 -...

  • Page 47: Drive Waveform

    Drive Waveform Vset Vsc_H Vsc_L - 45 -...

  • Page 48: Reset

    Reset Vsc_h Vset Cset Yrr1 Ramp YDCH SC_H XDCH Panel SC_L 10V Zener Ramp XDCL YDCL Ramp - 46 -...

  • Page 49: Address (Scan)

    Address (Scan) Vsc_h Vset Cset Yrr1 Ramp YDCH SC_H XDCH Panel SC_L 10V Zener Ramp XDCL YDCL Ramp - 47 -...

  • Page 50: Sustain Waveform

    Sustain Waveform Vsc_h Vsc_h Vsc_h Vset Vset Vset Cset Cset Cset Ramp Yrr1 Yrr1 Yrr1 YDCH YDCH SC_H SC_H SC_H XDCH XDCH XDCH Panel Panel Panel SC_L SC_L SC_L 10V Zener 10V Zener 10V Zener Ramp XDCL XDCL XDCL YDCL YDCL YDCL Ramp...

  • Page 51: Service Parts

    9. Service parts Model Name Sony P/N Sony Parts Description 1 KE-42M1(UC) A-1078-833-A Panel Module Assy 2 KE-P42M1(AEP) 178906211 X MAIN BOARD KE-MV42M1(CH) 178906311 Y MAIN BOARD KE-42M1(CND) 178906411 LOGIC BOARD KE-42M1(WB) 178906432 LOGIC BOARD 178906511 Y BUFFER BOARD (UP)
  • Page 52 English Sony EMCS Corporation 2005KL08-Data Made in Japan Ichinomiya TEC 9-878-250-02  2005. 11...

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